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1 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation sp333 +5v only rs-232/appletalk programmable transceiver +5v only, single supply operation low power shutdown 28-pin soic packaging 3 drivers, 5 receivers ?rs-232 complete appletalk interface high data rates 5mbps differential transceivers 460kbps single-ended transceivers description the sp333 is a monolithic device that supports both macintosh and pc serial interfaces. rs-232 mode offers three (3) rs-232 drivers and five (5) rs-232 receivers. mac mode includes a differential driver and a single-ended inverting driver. receivers in mac mode include one differential receiver, one non-inverting single-ended receiver and one inverting single-ended receiver. an on-chip charge pump allows +5v-only operation, and a low power shutdown mode makes the sp333 ideal for battery powered applications. the interface mode can be changed at any time by a mode select pin. +5v 5 0v v cc 25 9 12 10 0.1 f 0.1 f 14 26 11 13 0.1 f 0.1 f c2- c2+ v+ v- shutdown rs-232/macmode ti1 tx1 27 6 t1 ti2 tx2 28 7 t2 ti3 tx3 1 4 t3 rx1 ri1 19 15 r1 rx2 ri2 20 16 r2 rx3 ri3 21 17 r3 rx4 ri4 22 18 r4 rx5 ri5 23 24 r5 rxen gnd 3 8 +5v 5 +5v v cc 25 9 12 10 0.1 f 0.1 f 14 26 11 13 0.1 f 0.1 f c2- c2+ v+ v- shutdown rs-232/macmode ti1 tx1 27 6 t1 txen tx2 2 7 ti3 tx3 1 4 t3 rx1 19 r1 ri2 16 r3 rx3 ri3 21 17 rx5 ri5 23 24 r5 gnd 3 8 ri1 15 pc mode mac mode rxen sp333 sp333
2 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. v cc ...................................................................................................+12v input voltages logic........................................................-0.3v to (v cc +0.5v) drivers..................................................-0.3v to (v cc +0.5v) receivers.................................................................. 15v driver outputs...................................................................................... 14v storage temperature..................................................-65?c to +150?c power dissipation..........................................................................1000mw specifications t min to t max and v cc = 5v 5% unless otherwise noted. parameter min. typ. max. units conditions mac mode (pin 25 = +5v) differential driver high level output voltage +3.6 volts i oh = 8ma low level output voltage -3.6 volts i oh = ?ma differential output, load 5v volts r l = 450 ? (tx outputs to gnd) differential output, no load 10 volts r l = driver short circuit current 40 500 ma ?v v o +7v; v in low 0.8v or v in high 2.0v output leakage current 100 a ?v v o +7v; txen = v cc input high voltage 2.0 volts applies to differential driver inputs input low voltage 0.8 volts applies to differential driver inputs input current 20 av in = 0v to v cc transition time 30 ns r l = 450 ? , c l = 50pf; rise/fall 10% ?90% propagation delay t phl 100 ns r l = 450 ? , c l = 50pf t plh 100 ns r l = 450 ? , c l = 50pf data rate 5 mbps r l = 450 ? , c l = 50pf single-ended inverting driver high level output voltage +3.6 +6.0 volts r l = 450 ? to gnd; v in low 0.8v or v in high 2.0v low level output voltage ?.0 ?.6 volts r l = 450 ? to gnd; v in low 0.8v or v in high 2.0v driver open circuit voltage 10 volts r l = driver short circuit current 40 ma ?v v o +7v; infinite duration input high voltage 2.0 volts applies to single-ended driver inputs input low voltage 0.8 volts applies to single-ended driver inputs input current 20 av in = 0v to v cc transition time 30 ns r l = 450 ? , c l = 50pf; rise/fall 10% ?90% propagation delay t phl 100 ns r l = 450 ? , c l = 50pf t plh 100 ns r l = 450 ? , c l = 50pf data rate 5 mbps r l = 450 ? , c l = 50pf differential receiver differential input threshold -0.2 +0.2 volts -7v v cm +7v input hysteresis 70 mv v cm =0v input resistance 12 k ? -7v v cm +7v output voltage high 3.5 volts i source = ?ma output voltage low 0.4 volts i sink = +4ma short circuit current 85 ma 0v v out v cc
3 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation specifications (continued) t min to t max and v cc = 5v 5% unless otherwise noted. parameter min. typ. max. units conditions differential receiver propagation delay t phl 100 ns r l = 450 ? , c l = 50pf t plh 100 ns r l = 450 ? , c l = 50pf data rate 5 mbps r l = 450 ? , c l = 50pf single-ended inverting receiver input voltage range ?5 +15 volts input threshold low 0.8 1.2 volts input threshold high 1.7 3.0 volts hysteresis 200 500 1000 mv input impedance 3 5 7 k ? output voltage high 3.5 volts i source = ?ma output voltage low 0.4 volts i sink = +4ma propagation delay t phl 100 ns t plh 100 ns data rate 5 mbps single-ended non-inverting receiver input voltage range ? +7 volts input threshold low -0.2 volts input threshold high +0.2 volts hysteresis 70 mv input impedance 12 15 k ? output voltage high 3.5 volts i source = ?ma output voltage low 0.4 volts i sink = +4ma propagation delay t phl 100 ns t plh 100 ns data rate 5 mbps pc mode (pin 25 = gnd) rs-232 driver ttl input levels v il 0.8 volts applies to transmitter inputs v ih 2.0 volts applies to transmitter inputs high level voltage output +5.0 +15.0 volts r l = 3k ? to gnd low level voltage output -15.0 -5.0 volts r l = 3k ? to gnd open circuit output 15 volts r l = short circuit current 100 ma v out = gnd power off impedance 300 ohms v cc =0v; v out = 2v slew rate 60 v/ sr l =3k ? , c l =50pf; from +3v to -3v or -3v to +3v transition time 1.56 s rise/fall time, between +3v & ?v ; r l =3k ? , c l =2500pf propagation delay t phl 1.5 sr l =3k ? , c l =1000pf; from 1.5v of t in to 50% of v out t plh 1.3 sr l =3k ? , c l =1000pf; from 1.5v of t in to 50% of v out data rate 460 600 kbps r l =3k ? , c l =1000pf rs-232 receiver ttl output levels v ol 0.4 volts i sink = 4ma v oh 2.4 i source = -4ma receiver input high threshold 1.7 3.0 volts
4 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation specifications (continued) t min to t max and v cc = 5v 5% unless otherwise noted. parameter min. typ. max. units conditions rs-232 receiver low threshold 0.8 1.2 volts input voltage range -15 +15 volts input impedance 3 5 7 kohms v in = 15v hysteresis 0.2 0.5 1.0 volts v cc =+5v transmission rate 10 mbps propagation delay t phl 100 600 ns from 50% of v in to 1.5v of r out t plh 100 600 ns from 50% of v in to 1.5v of r out data rate 460 600 kbps power requirements no load supply current 15 25 ma no load; v cc =5.0v; t a =25?c shutdown supply current 75 at a =25?c, v cc =5.0v ac parameters d ifferential mode t pzl ; enable to output low 200 1000 ns c l =100pf, figures 2 & 4, s 2 closed t pzh ; enable to output high 200 1000 ns c l =100pf, figures 2 & 4, s 1 closed t plz ; disable from output low 200 1000 ns c l =15pf, figures 2 & 4, s 2 closed t phz ; disable from output high 200 1000 ns c l =15pf, figures 2 & 4, s 1 closed r eceiver delay time from enable mode to tri-state mode single-ended mode t pzl ; enable to output low 200 1000 ns c rl =15pf, figures 1 & 6, s 1 closed t pzh ; enable to output high 200 1000 ns c rl =15pf, figures 1 & 6, s 2 closed t plz ; disable from output low 200 1000 ns c rl =15pf, figures 1 & 6, s 1 closed t phz ; disable from output high 200 1000 ns c rl =15pf, figures 1 & 6, s 2 closed d ifferential mode t pzl ; enable to output low 200 1000 ns c rl =15pf, figures 1 & 6, s 1 closed t pzh ; enable to output high 200 1000 ns c rl =15pf, figures 1 & 6, s 2 closed t plz ; disable from output low 200 1000 ns c rl =15pf, figures 1 & 6, s 1 closed t phz ; disable from output high 200 1000 ns c rl =15pf, figures 1 & 6, s 2 closed notes: 1. measured from 2.5v of r in to 2.5v of r out . 2. measured from one?alf of r in to 2.5v of r out . 3. measured from 1.5v of t in to one?alf of t out . 4. measured from 2.5v of r o to 0v of a and b. 500 ? c l output under t est s 1 s 2 v cc 1k ? 1k ? c rl receiver output s 1 s 2 t est point v cc figure 2. receiver timing test load circuit figure 1. driver timing test load circuit
5 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation +3v 0v driver input tx 2 tx 1 driver output v o + differential output tx 1 ?tx 2 0v v o t skew t skew 1.5v 1.5v t plh t r t f f = 1mhz; t r < 10ns; t f < 10ns v o 1/2v o 1/2v o t phl v oh v ol rx 1.5v 1.5v t phl f = 1mhz; t r < 10ns; t f < 10ns output v 0d2 + v 0d2 ri 1 ?i 2 0v 0v t plh input +3v 0v txen 5v v ol 0v 1.5v 1.5v t zl t zh f = 1mhz; t r < 10ns; t f < 10ns v oh tx x 2.3v 2.3v t lz t hz 0.5v 0.5v output normally low output normally high tx x figure 4. driver enable and disable times figure 5. receiver propagation delays figure 3. driver propagation delays
6 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation theory of operation... the sp333 is a single chip device that can be configured via software for either rs-232 or appletalk interface modes at any time. the sp333 is made up of three basic circuit ele- ments: single-ended drivers and receivers, dif- ferential drivers and receivers, and charge pump. appletalk drivers/receivers... to program the sp333 for macmode, pin 25 should be connected to a logic high. in macmode, the sp333 offers a complete appletalk serial interface. the driver section of the appletalk interface is made up of a differential driver and a single- ended inverting driver. the differential driver has voltage swings that are typically 5v on each output pin under loaded conditions, and typically 8v under no-load conditions. the differential driver can maintain 3.6v (mini- mum) swings (per pin) under worst case load conditions of 450 ? between the differential output. the differential driver is equipped with a tri- state control pin. when txen is a logic low, the differential driver is active. when the txen pin is a logic high, the differential driver outputs are tri-stated. the txen pin only functions in macmode. the differential appletalk driver can support data rates up to 5mbps. the single-ended appletalk driver also has typical voltage output swings of 5v under loaded conditions, and 8v under no-load con- ditions. the single-ended appletalk driver can maintain 3.6v (minimum) swings under worst case conditions of 450 ? to ground. the single- ended appletalk driver can support data rates up to 5mbps. the receiver section of the sp333 is made up of a differential receiver, a single-ended non-in- verting receiver , and a single-ended inverting receiver. the differential receiver has an input sensitivity of 200mv over a common mode range of 7v. the receivers have a typical input resistance of 15k ? (12k ? minimum). the differential receiver can receive data up to 5mbps. the single-ended non-inverting receiver has a 200mv input threshold, however, the input voltage can vary between 7v. the typical input resistance of the single-ended non-invert- ing receiver is 15k ? (12k ? minimum). the single-ended non-inverting receiver can also receive data up to 5mbps. the sp333 also has a single-ended inverting receiver input. this receiver is basically an rs- 232 receiver (r5 receiver) and is typically used as a gpi (general purpose input) in the appletalk interface. the gpi input has ttl- compatible input thresholds that can receive signals up to 15v. the input resistance of the single-ended inverting receiver is typically 5k ? (3k ? to 7k ? ). the gpi receiver can operate up to 5mbps. +3v 0v rxen 5v rx x 0v 1.5v 1.5v t zl t zh f = 1mhz; t r < 10ns; t f < 10ns 1.5v 1.5v t lz t hz 0.5v 0.5v output normally low output normally high v il v ih rx x figure 6. receiver enable and disable times
7 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation output to a logic high state. the input resis- tance will maintain 3k ? -7k ? over a 15v range. the maximum operating voltage range for the receiver is 30v, under these conditions the input current to the receiver must be limited to less than 100ma. due to the on-chip esd pro- tection circuitry, the receiver inputs will be clamped to 15v levels; this should not affect operation at 30volts. the rs-232 receivers can operate over 400kbps. charge pump... the charge pump is a sipex-patented design (5,306,954) and uses a unique approach com- pared to older less-efficient designs. the charge pump still requires four external capacitors, but uses a four-phase voltage shifting technique to attain symmetrical 10v power supplies. the capacitor values of the sp333 can be as low as 0.1 f. figure 11a shows the waveform found on the positive side of capacitor c2, and figure 11b shows the negative side of capacitor c2. there is a free-running oscillator that controls the four phases of the voltage shifting. a de- scription of each phase follows. single ended drivers/receivers... rs-232 (v.28) drivers... the single-ended drivers and receivers comply the with the rs-232e and v.28 standards. the drivers are inverting transmitters which accept either ttl or cmos inputs and output the rs- 232 signals with an inverted sense relative to the input logic levels. typically, the rs-232 driver output voltage swing is 9v with no load and is guaranteed to be greater than 5v under full load. the drivers rely on the v+ and v- voltages generated by the on-chip charge pump to main- tain proper rs-232 output levels. with worst case load conditions of 3k ? and 2500pf, the four rs-232 drivers can still maintain 5v output levels. the drivers can operate over 400kbps; the propagation delay from input to output is typically 1.5 s. during shutdown, the driver outputs will be put into a high impedance tri-state mode. rs-232 (v.28) receivers... the rs-232 receivers convert rs-232 input signals to inverted ttl signals. each of the four receivers features 500mv of hysteresis margin to minimize the affects of noisy tranmission lines. the inputs also have a 5k ? resistor to ground, in an open circuit situation the input of the receiver will be forced low, committing the figure 7. charge pump phase 1 figure 8. charge pump phase 2 figure 9. charge pump phase 3 figure 10. charge pump phase 4 v cc = +5v +10v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?v ?v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?0v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?v +5v ?v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++
8 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation phase 1 -vss charge storage- during this phase of the clock cycle, the positive side of capacitors c1 and c2 are initially charged to +5v. c1+ is then switched to ground and charge in c1- is trans- ferred to c2-. since c2+ is connected to +5v, the voltage potential across capacitor c2 is now 10v. phase 2 -vss transfer- phase two of the clock connects the negative terminal of c2 to the vss storage capacitor and the positive terminal of c2 to ground, and transfers the generated -10v to c3. simultaneously, the positive side of capacitor c1 is switched to +5v and the negative side is connected to ground. phase 3 -vdd charge storage- the third phase of the clock is identical to the first phase- the trans- ferred charge in c1 produces -5v in the negative terminal of c1, which is applied to the negative side of capacitor c2. since c2+ is at +5v, the voltage potential across c2 is 10v. phase 4 -vdd transfer- the fourth phase of the clock connects the negative terminal of c2 to ground and transfers the generated 10v across c2 to c4, the vdd storage capacitor. simultaneously with this, the positive side of capacitor c1 is switched to +5v and the negative side is connected to ground, and the cycle begins again. since both v+ and v- are separately generated from vcc in a no load condition, v+ and v- will be symmetrical. older charge pump approaches that generate v- from v+ will show a decrease in the magnitude of v- compared to v+ due to the inherent inefficiencies in the design. the clock rate for the charge pump typically operates at 15khz. the external capacitors should be 0.1 f with a 16v breakdown rating. external power supplies for applications that do not require +5v only, external supplies can be applied at the v+ and v- pins. the value of the external supply volt- ages must be no greater than 10v. the current drain from the 10v supplies is used for the rs- 232 drivers. for the rs-232 driver, the current requirement is 3.5ma per driver. the external power supplies should provide a power supply sequence of either: +10v, ?0v, and then +5v; or ?0v, +10v, and then +5v. it is critical that the 10v supplies are on before v cc . figure 11. charge pump waveforms ?0v b) c 2 gnd gnd a) c 2 + +10v
9 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation shutdown mode the sp333 can be put into a low power shut- down mode by connecting the shutdown pin (sd, pin 26) to a logic high. during shut- down, the driver outputs are put into a high impedance tri-state, and the charge pump is put into stand-by mode. the supply current drops to less than 10 a during shutdown and can be activated in either rs-232 or appletalk mode. for normal operation, the sd pin should be connected to a logic low. receiver enable the sp333 has a control line to enable or disable the receiver outputs. pin 3 (rxen) is active low; a logic low on pin 3 will enable the receiver outputs. a logic high on pin 3 will disable the receiver outputs. the receiver en- able function can be initiated in either rs-232 or appletalk mode. wake-up the sp333 also features a "wake-up" function. the wake up function allows the rs-232 receiv- ers to remain active during shutdown mode unless they are disabled by the receiver enable control pin (pin 3). the wake-up feature allows users to take advantage of the low power shut- down mode and keep the receivers active to accept an incoming "ring indicator" signal.
10 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation 19 15 16 4 1 21 17 24 23 0.1 f 0.1 f 0.1 f 0.1 f 9 12 11 13 5 10 14 27 6 7 2 8 3 +5v 26 25 +5v 6 3 1 8 5 2 7 4 4 15 19 16 20 17 21 18 22 6 27 7 28 4 1 24 23 3 8 +5v 0.1 f 0.1 f 0.1 f 0.1 f 9 12 11 13 5 10 14 26 25 0v 1 5 8 2 7 6 3 sp333 sp333 sp333 typical application for appletalk and rs-232 appletalk interface pc interface
11 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ti3 txen rxen tx3 vcc tx1 tx2 gnd c1+ v+ c2+ c1- c2- v- sp333 ti2 ti1 sd rs-232/mac ri5 rx5 rx4 rx3 rx2 rx1 ri4 ri3 ri2 ri1 +5v 5 0v v cc 25 9 12 10 0.1 f 0.1 f 14 26 11 13 0.1 f 0.1 f shutdown rs-232/macmode ti1 tx1 27 6 t1 ti2 tx2 28 7 t2 ti3 tx3 1 4 t3 rx1 ri1 19 15 r1 rx2 ri2 20 16 r2 rx3 ri3 21 17 r3 rx4 ri4 22 18 r4 rx5 ri5 23 24 r5 rxen gnd 3 8 +5v 5 v cc 25 9 12 10 0.1 f 0.1 f 14 26 11 13 0.1 f 0.1 f c2- c2+ v+ v- shutdown rs-232/macmode ti1 tx1 27 6 t1 txen tx2 2 7 ti3 tx3 1 4 t3 rx1 19 r1 ri2 16 r3 rx3 ri3 21 17 rx5 ri5 23 24 r5 gnd 3 8 ri1 15 pc mode (rs-232) mac mode (appletalk) +5v sp333 sp333 c2- c2+ v+ v- rxen sp333 pin configuration sp333 typical operating circuit
12 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation d eh pa ckage: plastic small outline (soic) dimensions (inches) minimum/maximum (mm) a a1 l b e a a1 b d e e h l 28?in 0.093/0.104 (2.352/2.649) 0.004/0.012 (0.102/0.300) 0.013/0.020 (0.330/0.508) 0.697/0.713 (17.70/18.09) 0.291/0.299 (7.402/7.600) 0.050 bsc (1.270 bsc) 0.394/0.419 (10.00/10.64) 0.016/0.050 (0.406/1.270) 0 /8 (0 /8 )
13 rev 07/29/02 sp333 rs-232/appletalk programmable transceiver ?copyright 2002 sipex corporation ordering information model temperature range package types sp333ct .............................................................................. 0?c to +70?c ......................................................................................... 28-pin soic sp333et ............................................................................. -40?c to +85?c ............................. ........................................................... 28-pin soic corporation signal processing excellence sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. sipex corporation headquarters and sales office 22 linnell circle billerica, ma 01821 tel: (978) 667-8700 fax: (978) 670-9001 e-mail: sales@sipex.com sales office 233 south hillview drive milpitas, ca 95035 tel: (408) 934-7500 fax: (408) 935-7600

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